The circuit and construction of an EEPROM cell is known, for example, from U.S. Pat. No. 5,107,461, and a process for manufacturing such cells is known from U.S. Pat. No. 5,132,239, both documents being incorporated hereto by reference.
A typical field of application for EEPROMs is that of chip cards, better known as smart cards.
In such applications, it is highly important to prevent the data contained in the memory from being read in an anomalous way, that is by unsealing the package and reading directly from the die through the terminals of the cell matrix, rather than through the terminals of the memory device.
It is common practice, in manufacturing the integrated circuit, to cover the memory device, and hence the matrix, with a metal structure. Accordingly, a direct reading can only be effected by first removing this metal structure, which represents a difficult and critical operation susceptible to result in the memory contents being destroyed.